Classical error control codes have been designed under the assumption of binary symmetric errors, i.e. both 1→0 and 0→1 errors can occur during transmission. Nevertheless, errors in some VLSI and optical systems are asymmetric in nature (5, 8). For example, in VLSI circuits and memories, charges may leak with time but new charges will not be added. Thus, a suitable channel model for such systems is the binary asymmetric channel (Z-channel) where errors are of one dominant type known a priori, say 1→0 errors. In Varshamov et al. (9), Varshamov introduced the q-ary asymmetric channel where the channel's input/output symbols are over the alphabet Q={0, 1, . . . , q−1}. Moreover, such channel has the property that, when a symbol aεQ is transmitted, the corresponding received symbol is in the set {0, 1, . . . , a}, assuming a decreasing error.
Similar to the asymmetric channel is the unidirectional channel; the difference is that the type of error is not known a priori. Asymmetric/unidirectional error control codes have been the subject of many research work (3, 7).
Not until recently has the notion of limited magnitude asymmetric errors been introduced (2); we say that a vector (xn-1, xn-2, . . . , x0) over Zq suffers an asymmetric error of maximum magnitude/level l≦q−1 if and only if the corresponding channel output (x′n-1, x′n-2, . . . , x′0) is such that xi′ε{xi−l, xi−l+1, . . . , xi}, with xi′εQ. FIG. 1 illustrates the difference between the traditional q-ary asymmetric channel and the q-ary asymmetric channel with level l=1.
In Cassuto et al. (4), an interesting application for this special case of q-ary asymmetric channel was pointed out: multi-level flash memories. Unlike traditional single-level flash memories where each cell stores only one bit, multi-level flash memories achieve higher storage capacities and thus lower manufacturing costs by programming the cells into one of q>2 threshold voltage thereby storing log2 q bits per cell. Nevertheless, increasing the number of threshold levels imposes an important challenge (6): the voltage difference between states is narrowed since—technically—the voltage window is limited. A natural consequence is that reliability issues such as low data retention and read/write disturbs become more significant (4); errors in such cases are typically in one dominant direction and of limited magnitude.
In Ahlswede et al. (1), the authors introduced codes capable of correcting all asymmetric errors of limited magnitude l (or l-AEC codes for short). However, the proposed codes are non-systematic. A systematic code, where the information symbols are separated from the check symbols, is advantageous over a non-systematic code because, in a systematic code, the data processing and encoding/decoding can be done in parallel. Thus, there is a need in the art for a systematic codes for correcting all asymmetric and symmetric errors of limited magnitude.